Make nothing to be done for

make: Nothing to be done for `default'.

While writing make files to compile kernel modules we might come across the error



The common cause for the error is lack of tab space before the command.
A make rule always has three parts a target,prerequisite and the command to generate the target from the prerequisite.



For make to be able to differentiate between a command and a target, the command always needs to be prefixed with one tab space. In case we fail to do so then make will not recognize it as a command and throw an error saying that there is no command specified for the target. It is the same error as given above where default is the target.

Thus to solve the problem just open the makefile and add a tabspace before the command for whichever target the error is being thrown.


Posted by tuxthink

Make nothing to be done for
Make nothing to be done for

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I was going through the steps to set up my environment and I’m stuck on running make on the Blink example with a message ‘make: Nothing to be done for ‘all’’.

Trying to figure this out the only things I’m finding that seem like they may be relevant would be the Path not being correct? I added C:\Program Files (x86)\GnuWin32\bin as per mentioned in this thread which seemed right, but this is my first encounter with Paths so I may be missing the boat here.

If you are getting this error (make: Nothing to be done for `all'.) when you 'make' it simply means that you are trying to 'make' the same application a second time.

You can resolve this by cleaning the previous make and then running make again.

make clean

When you do the m'make clean', it cleans up the previous make and now you can do the make again.

make


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Comment on this tutorial

Sometimes "Nothing to be done for all" error can be caused by spaces before command in makefile rule instead of tab. Please ensure that you use tabs instead of spaces inside of your rules.

all:
<\t>$(CC) $(CFLAGS) ...

instead of

all:
    $(CC) $(CFLAGS) ...

Please see the GNU make manual for the rule syntax description: https://www.gnu.org/software/make/manual/make.html#Rule-Syntax

其实嘛,出现这个的原因在于,已经编译过啦,没有任何改动,那还烦劳编译啥呢。

那Linux又是如何知道已经编译过了呢?

那就要看makefile的规则啦。makefile的规则是所想产生的文件需要依赖很多 .o文件。若文件没有改动,.o文件也没有改动,则Linux认为,我不需要对所有的文件做任何事情。

那如何让make重新编译源文件呢?

有时候,因为系统的不同,导致运行库版本不同,则需要重新编译源文件。方法如下:

>make clean(清除上次make命令所产生的object文件(后缀为“.o”的文件)及可执行文件。)

>ldconfig  (该命令通常在系统启动时运行,确保动态链接库为系统所共享。当用户安装了一个新的动态链接库时,则需手工运行该命令。)

>make(执行makefile文件)

这样就能够重新编译啦。

The configure program is a shell script that is supplied with the source tree. Its job is to analyze the build environment. configure command creates several new files in our source directory. The most important one is Makefile. Makefile is a configuration file that instructs the make program exactly how to build the program. The make program takes as input a make file (which is normally named Makefile), which describes the relationships and dependencies among the components that compose the finished program.

While writing make files to compile kernel modules we might come across the error:

make: Nothing to be done for 'default'.

The common cause for the error is the lack of tab space before the command. A make rule always has three parts a target, a prerequisite, and the command to generate the target from the prerequisite.

target:prerequisite
       command

For make to be able to differentiate between a command and a target, the command always needs to be prefixed with one tab space. In case we fail to do so then make will not recognize it as a command and throw an error saying that there is no command specified for the target. It is the same error as given above where default is the target.

Thus to solve the problem just open the makefile and add a tab space before the command for whichever target the error is being thrown.

Final Note

./configure, make, make install — can be used to build many source code packages. We have also seen the important role that makes plays in the maintenance of programs. The make program can be used for any task that needs to maintain a target/dependency relationship, not just for compiling source code. We have seen how to resolve the “Nothing to be done for ‘default'” error while running the make program.

What is make clean command?

It allows you to type 'make clean' at the command line to get rid of your object and executable files. Sometimes the compiler will link or compile files incorrectly and the only way to get a fresh start is to remove all the object and executable files.

What does make command do?

The make command assists in maintaining a set of programs, usually pertaining to a particular software project, by building up-to-date versions of programs. The make command is most useful for medium-sized programming projects.

How do makefiles work?

Makefile sets a set of rules to determine which parts of a program need to be recompile, and issues command to recompile them. Makefile is a way of automating software building procedure and other complex tasks with dependencies. Makefile contains: dependency rules, macros and suffix(or implicit) rules.

How to use make on Linux?

The Linux make command is used to build and maintain groups of programs and files from the source code..
. ... .
say_hello:.
@echo "Hello World!".
generate:.
@echo "Creating files".
touch file-{1.. ... .
@echo "Listing files".